College/University/Organization
Name: Kongu Engineering College, Perundurai
Organizing Department: Electronics and Instrumentation Engineering
Event Date: 2015-02-14 -- 2015-02-14
(YYYY/MM/DD)
Last Date: 2015-02-10 (YYYY/MM/DD)
Address: Erode, Tamilnadu, India
Registration Fee:
Faculty members Rs.1000/-+ Service tax 12.36%
Students Rs.750/- + Service tax 12.36%
Students Rs.750/- + Service tax 12.36%
Email Address: kalavathidevi@gmail.com
About Event:
VLSI Applications form the key to many emerging systems of modern technology. Today there are several applications where FPGAs can provide better solutions than ASICs and conventional microprocessors.. With the advent of FPGAs we have entered the era of reconfigurable computing. FPGAs act as a sort of system-level silicon super-glue, sitting at the periphery of the circuit board making anything to connect to anything else, so that we could adapt on the fly and change our design to leverage any new, improved component without having to abandon the rest of the design. Through this course we try to provide interesting insights into the world of FPGAs. The workshop will provide an understanding of Design-implementation flow involved in FPGA Design and Implementation. Workshop module will provide the participants with hands-on tool usage experience. The training emphasizes hands on experience of Analog & digital design and its implementations on Xilinx boards.
Other Details:
COURSE TOPICS
Behavioral and structural description for design
representation and design entry.
Validation through functional simulation.
Partitioning, Placement and Routing.
Post routing simulation for performance analysis.
FPGA specific structural optimization with respect
to speed and area.
Configuration bitstream generation for actual
implementation on FPGA.
Behavioral and structural description for design
representation and design entry.
Validation through functional simulation.
Partitioning, Placement and Routing.
Post routing simulation for performance analysis.
FPGA specific structural optimization with respect
to speed and area.
Configuration bitstream generation for actual
implementation on FPGA.
Contact Details:
The Convener
FPGA Based VLSI Design
Department of EIE
Kongu Engineering College
Perundurai
FPGA Based VLSI Design
Department of EIE
Kongu Engineering College
Perundurai
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