Organizing Department: ECE
Event Date: 10/13/2016 -- 10/14/2016
(MM/DD/YYYY)
Last Date: 10/10/2016 (MM/DD/YYYY)
Address: COIMBATORE, Tamilnadu, India
Registration Fee:
* STUDENTS (UG/PG) - Rs.750/-
* FACULTY / RESEARCH SCHOLARS- Rs.1000 /-
* INDUSTRY PEOPLE - Rs. 1200 /-
* FACULTY / RESEARCH SCHOLARS- Rs.1000 /-
* INDUSTRY PEOPLE - Rs. 1200 /-
College/University/Organization
Website: www.kahedu.edu.in
Event Website / Brochure link: www.kahedu.edu.in
Email Address: gr.mahendrababu@gmail.com
About Event:
Two days hands on workshop on "VLSI DESIGN USING CADENCE
EDA TOOLS" focuses on the physical design concepts, static timing
analysis(STA), power analysis & logic equivalence checking. It is useful
for VLSI design engineers. Training will be based on cadence EDA tools &
session will be handled by Engineers from Cadence Design System,Bangalore.
Who Can Participate?
* All BE/B.TECH (ECE,CSE,EEE) & ME/M.TECH (VLSI/APLLIED
ELECTRONICS/EMBEDDED SYSTEMS)
*RESEARCH SCHLORS
* VLSI ENGINEERS
*RESEARCH SCHLORS
* VLSI ENGINEERS
Accommodation Details:
YES ON PAYMENT BASIS
Other Details:
RESOURCE PERSON:
Engineers from Cadence systems, Bangalore.
Engineers from Cadence systems, Bangalore.
Contact Details:
G.R.Mahendra Babu - 9965539275
M.Daranikumar - 9843533202
M.Daranikumar - 9843533202
For any clarification about
this event, please contact the above mentioned address.
NATIONAL
LEVEL HANDS ON WORKSHOP ON VLSI DESIGN USING CADENCE EDA TOOLS-2016-KARPAGAM
UNIVERSITY,COIMBATORE-COIMBATORE-Tamilnadu-India
See Also