National Level Workshop VLSI DESIGN USING CADENCE EDA TOOLS, October 2016, KARPAGAM UNIVERSITY, COIMBATORE, Tamilnadu, India


College/University/Organization Name: KARPAGAM UNIVERSITY
Organizing Department: ECE
Event Date: 10/13/2016 -- 10/14/2016    (MM/DD/YYYY)
Last Date: 10/10/2016    (MM/DD/YYYY)
Address: COIMBATORE, Tamilnadu, India

Registration Fee:

750

College/University/Organization Website: www.kahedu.edu.in

Event Website / Brochure link:  www.kahedu.edu.in

Email Address: gr.mahendrababu@gmail.com

About Event:

Two days hands on workshop on "VLSI DESIGN USING CADENCE EDA TOOLS" focuses on the physical design concepts, static timing analysis(STA), power analysis & logic equivalence checking. It is useful for VLSI design engineers. Training will be based on cadence EDA tools & session will be handled by Engineers from Cadence Design System,Bangalore.

Who Can Participate?

students

Accommodation Details:

yes,coz the workshop is about two days


Contact Details:
kapilavarshika@gmail.com(7200487431)
indumathimanimaren@gmail.com
swathikamol96@gmail.com
vinojanu14@gmail.com

For any clarification about this event, please contact the above mentioned address.

 VLSI DESIGN USING CADENCE EDA TOOLS-2016-KARPAGAM UNIVERSITY-COIMBATORE-Tamilnadu-India

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