Organizing
Department: EIE
Event Date: 09/07/2017 -- 09/07/2017
(MM/DD/YYYY)
Last Date: 08/30/2017 (MM/DD/YYYY)
Address: Erode/Perundurai, Tamilnadu, India
Registration
Fee:
Rs.850/- Faculty members and Industrial Persons
Rs.600/- PG/UG Students
Rs.600/- PG/UG Students
College/University/Organization Website: http://kongu.ac.in/
Event Website / Brochure link: http://kongu.ac.in/events/eiefpga
Email Address: baluprithviraj@gmail.com
About Event:
*FPGA architecture and design flow
* Behavioral and structural description for design representation and design entry
* FPGA specific structural optimization with respect to speed and area
* Introduction to System Generator
* Model and simulate Digital functions using Simulink/ System Generator
* Integrate Xilinx System Generator with MATLAB/Simulink and explore model based design approach using Xilinx FPGA’s
* Use custom boards for hardware co-simulation
* Configuration bitstream generation for actual implementation on FPGA.
* Behavioral and structural description for design representation and design entry
* FPGA specific structural optimization with respect to speed and area
* Introduction to System Generator
* Model and simulate Digital functions using Simulink/ System Generator
* Integrate Xilinx System Generator with MATLAB/Simulink and explore model based design approach using Xilinx FPGA’s
* Use custom boards for hardware co-simulation
* Configuration bitstream generation for actual implementation on FPGA.
Who Can Participate?
Faculty from
AICTE approved Engineering Colleges
Polytechnics, UG and PG students, Research Scholar and Industrial Persons
Polytechnics, UG and PG students, Research Scholar and Industrial Persons
Accommodation
Details:
Accomodation-
Rs.200/per day
Other Details:
VLSI Applications form the key to many emerging systems of modern technology. Today there are several applications where FPGAs can provide better solutions than ASICs and conventional microprocessors. With the advent of FPGAs we have entered the era of reconfigurable computing. FPGAs act as a sort of system-level silicon super-glue, sitting at the periphery of the circuit board making anything to connect to anything else, so that we could adapt on the fly and change our design to leverage any new, improved component without having to abandon the rest of the design.
Contact Details:
K.N.Baluprithviraj
Assistant Professor
Department of EIE
Kongu Engineering College
Perundurai-638060
Ph: 9363067473
email id: baluprithviraj@gmail.com
Assistant Professor
Department of EIE
Kongu Engineering College
Perundurai-638060
Ph: 9363067473
email id: baluprithviraj@gmail.com
For any
clarification about this event, please contact the above mentioned address.
Workshop on
FPGA HARDWARE CO-SIMULATION MODEL IMPLEMENTATION USING SYSGEN-2017-Kongu
Engineering College-Erode/Perundurai-Tamilnadu-India
See Also
Workshop on FPGA-Erode/Perundurai-2017-Kongu Engineering
College-tamilnadu